HomeHuawei unveils next-gen Ascend chips to fuel top-performing AI clusters
At this week's Huawei Connect 2025 event in Shanghai, the Chinese tech giant unveiled its roadmap for the next-generation Ascend chip series.
During his keynote address, Huawei Deputy Chairman Eric Xu reflected on 2025 as a "seminal year," highlighting January's DeepSeek-R1 launch as pivotal. He candidly acknowledged China's anticipated lag in semiconductor process node technology "for the foreseeable future."
Facing trade restrictions, Huawei is doubling down on infrastructure innovation while open-sourcing significant software assets, including its openPangu foundation AI models and Mind SDK series.
The Ascend Evolution
The upcoming Ascend lineup will feature three new series: 950, 960, and 970 chipsets.
The Ascend 950PR and 950TO will share common silicon architecture while enhancing support for FP8 low-precision computing (delivering 1 PFLOP) and MXFP8 (rated at 2 PFLOPs). Each PFLOP represents one quadrillion floating-point operations per second.
Architectural improvements include refined vector processing and optimized 128-byte memory access granularity (down from 512 bytes). The 950 series boasts 2 TB/s interconnect bandwidth - a 150% increase over the current Ascend 910C. Market availability spans Q1 2026 for the 950PR through Q4 2026 for the 950DT.
Succeeding in Q4 2027, the Ascend 960 doubles every key metric: computing power, memory bandwidth, capacity, and interconnect ports. It introduces Huawei's proprietary HiF4 format, claimed to surpass conventional FP4 precision.
The flagship Ascend 970 (Q4 2028) aims to "significantly elevate all specifications," targeting 4TB/s interconnects, 8 PFLOPs FP4 performance, and expanded memory capacity.
NPU SuperPods
Huawei's hyperscale computing solution takes form in Atlas SuperPods, debuting Q4 2026 with 950DT-chip equipped systems. Compared to NVIDIA's upcoming NVL144 (2026), Huawei claims its inaugural SuperPod delivers 56.8x more NPUs and nearly 7x the processing power - maintaining superiority even against NVIDIA's projected 2027 NVL576.
General-Purpose Processors
The Kunpeng 950 processor family arrives Q1 2026 featuring 96-core/192-thread and 192-core/384-thread configurations. Concurrently, Huawei will launch the TaiShan 950 SuperPod - touted as the world's first general-computing SuperPod solution.
Open-Source Interconnect
Next-generation SuperPods will implement UnifiedBus 2.0, evolving from the March 2023-deployed Atlas 900 A3's interconnection standard (now in 300+ installations). As an open protocol, UnifiedBus 2.0 specifications release simultaneously to developers.
The technology will power internal SuperPod communications and enable SuperCluster formations. The inaugural Atlas 950 SuperCluster outperforms xAI's Colossus by 2.5x NPU density and 1.3x computing power.
By late 2027, Huawei plans its Atlas 960 SuperCluster, integrating over one million NPUs capable of 4 zettaFLOPS FP4 performance (1 ZFLOP = 10²¹ operations/sec). "UnifiedBus-powered SuperPods and SuperClusters address today's and tomorrow's exponential computing demands," Xu concluded.
Explore AI and big data innovations at the global AI & Big Data Expo across Amsterdam, California, and London. This TechEx event converges with other leading technology conferences - click here for details.
AI News is presented by TechForge Media. Discover more enterprise tech events and webinars here.
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At this week's Huawei Connect 2025 event in Shanghai, the Chinese tech giant unveiled its roadmap for the next-generation Ascend chip series.
During his keynote address, Huawei Deputy Chairman Eric Xu reflected on 2025 as a "seminal year," highlighting January's DeepSeek-R1 launch as pivotal. He candidly acknowledged China's anticipated lag in semiconductor process node technology "for the foreseeable future."
Facing trade restrictions, Huawei is doubling down on infrastructure innovation while open-sourcing significant software assets, including its openPangu foundation AI models and Mind SDK series.
The Ascend Evolution
The upcoming Ascend lineup will feature three new series: 950, 960, and 970 chipsets.
The Ascend 950PR and 950TO will share common silicon architecture while enhancing support for FP8 low-precision computing (delivering 1 PFLOP) and MXFP8 (rated at 2 PFLOPs). Each PFLOP represents one quadrillion floating-point operations per second.
Architectural improvements include refined vector processing and optimized 128-byte memory access granularity (down from 512 bytes). The 950 series boasts 2 TB/s interconnect bandwidth - a 150% increase over the current Ascend 910C. Market availability spans Q1 2026 for the 950PR through Q4 2026 for the 950DT.
Succeeding in Q4 2027, the Ascend 960 doubles every key metric: computing power, memory bandwidth, capacity, and interconnect ports. It introduces Huawei's proprietary HiF4 format, claimed to surpass conventional FP4 precision.
The flagship Ascend 970 (Q4 2028) aims to "significantly elevate all specifications," targeting 4TB/s interconnects, 8 PFLOPs FP4 performance, and expanded memory capacity.
NPU SuperPods
Huawei's hyperscale computing solution takes form in Atlas SuperPods, debuting Q4 2026 with 950DT-chip equipped systems. Compared to NVIDIA's upcoming NVL144 (2026), Huawei claims its inaugural SuperPod delivers 56.8x more NPUs and nearly 7x the processing power - maintaining superiority even against NVIDIA's projected 2027 NVL576.
General-Purpose Processors
The Kunpeng 950 processor family arrives Q1 2026 featuring 96-core/192-thread and 192-core/384-thread configurations. Concurrently, Huawei will launch the TaiShan 950 SuperPod - touted as the world's first general-computing SuperPod solution.
Open-Source Interconnect
Next-generation SuperPods will implement UnifiedBus 2.0, evolving from the March 2023-deployed Atlas 900 A3's interconnection standard (now in 300+ installations). As an open protocol, UnifiedBus 2.0 specifications release simultaneously to developers.
The technology will power internal SuperPod communications and enable SuperCluster formations. The inaugural Atlas 950 SuperCluster outperforms xAI's Colossus by 2.5x NPU density and 1.3x computing power.
By late 2027, Huawei plans its Atlas 960 SuperCluster, integrating over one million NPUs capable of 4 zettaFLOPS FP4 performance (1 ZFLOP = 10²¹ operations/sec). "UnifiedBus-powered SuperPods and SuperClusters address today's and tomorrow's exponential computing demands," Xu concluded.
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